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PCI CD/CDa Configurable DMA Interface User’s Guide Registers

EDT, Inc. May 2007 21

Figure 7. Scatter-gather DMA List Format

All main DMA registers are read-only. Only the corresponding scatter-gather DMA registers must

write to them. To initiate a DMA transfer, the driver performs the following general operations:

1. It sets up one or more scatter-gather DMA lists in host memory, using the format described above

and illustrated in Figure 7.

2. It writes the address of the first entry in the list to the Scatter-gather DMA Next Address Register.

3. It writes the length of the scatter-gather DMA list to the Scatter-gather DMA Next Count and Con-

trol Register, setting the interrupts as you require. Setting bit 29 of this register to 1 starts the DMA.

4. If the DMA list is greater than one page, it loads the address of the first entry of the next page and

its length, as described in steps 2 and 3, when bit 29 of theScatter-gather DMA Next Count and

Control Register is asserted.

Main DMA Current Address Register

Size 32-bit

I/O read-only

Address 0x00

Access EDT_DMA_CUR_ADDR

Comment This register is automatically copied from the main DMA next address register after

main DMA completes.

Main DMA Next Address Register

Size 32-bit

I/O read-only

Address 0x04

Access EDT_DMA_NXT_ADDR

Comment The scatter-gather DMA fills this register when required from the scatter-gather

DMA list.

Bits

63 32 31 16 0

Each

entry

address control (unused)

int

count

Bit Description

31–0 The address of the current DMA, or the last used address if no DMA is currently active.

Bit Description

31–0 Read the starting address of the next DMA.

1 2 ... 20 21 22 23 24 25 26 27 28 29 30 ... 39 40

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