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EDT, Inc. May 2007 1

The PCI Bus Configurable DMA Interface

The Configurable DMA Interface (PCI CD/CDa) is a single-slot DMA input/output interface for PCI

Bus-based computer systems. It is designed for continuous input or output between a user device and

PCI Bus host memory. This interface is typically used to move data to or from a PCI Bus host computer

to devices such as scanners, plotters, imaging devices, or research prototypes.

The basic configuration of the PCI CD/CDa uses a bidirectional single-channel 16-bit parallel protocol.

In a 66 MHz PCI Bus slot, it can transfer up to 210 MB per second. It is available using either RS-422

or LVDS signal levels. A variety of other options are also available: a 16-channel synchronous serial

protocol, a 4-channel synchronous serial protocol, a single channel synchronous serial protocol, or an

8-bit parallel protocol. Manuals describing these options are listed in Related Manuals on page 2.

The PCI CD-20 (RS-422) and the PCI CD-60 (LVDS) are older versions of the PCI CDa that use

different versions of the DMA engine, but have many of the same capabilities. However, they operate

only in a 33 MHz PCI Bus slot.

The PCI CD/CDa implements the DMA interface using two Xilinx field-programmable gate arrays,

referred to as the PCI Xilinx and the UI (user interface) Xilinx.

•The PCI Xilinx communicates with the host computer over the PCI Bus. It transfers data between

the board and the host computer, and loads its firmware on powerup from flash ROM.

• The UI Xilinx transfers data between the user device and the board, through the connector. The

UI Xilinx may also process the data in some manner, depending on the application.

Each Xilinx must be loaded with the firmware specific to the chosen interface, and the firmware in one

Xilinx must be compatible with the firmware in the other. The PCI CD/CDa comes configured for the

interface you ordered; a list of the firmware files provided is available in About the Software and

Firmware on page 3, and instructions for loading them, if necessary, are provided in Configuring the

Board on page 7.

When data comes in from the user device, the UI Xilinx sends it to input and output FIFO buffers, which

smooth data transfer between the PCI bus and the user device, as well as accommodating data during

the transition from one DMA to the next. DMA transfers are queued in hardware, minimizing the

amount of FIFO required. The PCI CD/CDa uses 4 KB input and output FIFOs; the PCI CDa

implements these FIFOs internally in the UI Xilinx; the PCI CD-20 and CD-60 implement them

externally.

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