PCI CD PCI Bus Configurable DMA Interface User’s Guide
iv EDT, Inc.
Scatter-gather DMA Current Address Register..................................................................................24
Scatter-gather DMA Next Address Register ......................................................................................24
Scatter-gather DMA Current Count and Control Register..................................................................24
Scatter-gather DMA Next Count and Control Register ......................................................................25
PLL Programming Register................................................................................................................26
Flash ROM Address Register ............................................................................................................26
Flash ROM Data Register..................................................................................................................27
PCI Interrupt and UI Xilinx Configuration Register.............................................................................27
PCI Interrupt Status Register.............................................................................................................28
UI Xilinx Data Register.......................................................................................................................28
UI Xilinx Registers..............................................................................................................................29
Command Register ...................................................................................................................29
Data Path Status Register.........................................................................................................30
Funct Register...........................................................................................................................30
Stat Register..............................................................................................................................31
Stat Polarity Register.................................................................................................................31
Direction Control Registers .......................................................................................................32
Programmed I/O Low Register..................................................................................................33
Programmed I/O High Register.................................................................................................33
Interface Configuration Register................................................................................................34
PCI CDa Registers.............................................................................................................................35
PLL Programming Register.......................................................................................................35
PLL Divider Register .................................................................................................................35
Output Data Valid Delay Register .............................................................................................35
LED Control Register ................................................................................................................36
References .................................................................................................................................................37
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