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Registers PCI CD/CDa Configurable DMA Interface User’s Guide

26 EDT, Inc. May 2007

PCI Interrupt and UI Xilinx Configuration Register

Size 32-bit

I/O read-write

Address 0xC4

Access EDT_REMOTE_OFFSET

To program the UI Xilinx:

1. Clear the PROG and INIT pins.

2. Wait for DONE (bit 20) to be clear.

3. Set the PROG and INIT pins.

4. Loop until INIT state (bit 21) is set.

5. Wait four μs.

6. Write programming data, one bit at a time, to bit 16 with bit 17 set.

7. After all data is written, continue writing ones to bit 16 until DONE (bit 20) is set.

The programming has failed if it has not completed after 32 clock cycles.

8 A read-only bit indicating the position of the jumper that enables access to the protected area of the

ROM that contains the executable program. A value of 1 indicates that the board can load a new

program.

7–0 The new program to load into flash ROM with a write operation (specified by setting bit A24 in the flash

ROM address register), or the data that was read (specified by clearing bit A24 in the flash ROM

address register).

Bit EDT_ Description

31–22 not used

21 RMT_STATE UI Xilinx INIT pin state. This bit is read-only.

20 RMT_DONE UI Xilinx DONE pin.

19 RMT_PROG UI Xilinx PROG pin.

18 RMT_INIT UI Xilinx INIT pin.

17 EN_CCLK Enable one configuration clock cycle to UI Xilinx.

16 RMT_DATA UI Xilinx program data

15 PCI_EN_INTR Enable PCI interrupt.

14 RMT_EN_INTR Enable UI Xilinx interrupt.

13–9 not used

8 RFIFO_ENB After the UI Xilinx has been programmed to your satisfaction:

1. Toggle bit D3 of the UI Xilinx command register.

2. Set this bit to enable the burst data FIFO.

7 not used

6–0 RMT_ADDR 128-byte address of UI Xilinx register

Bit Description

1 2 ... 25 26 27 28 29 30 31 32 33 34 35 ... 39 40

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